Damascene structures in semiconductor substrates are so-named because they consist of metal lines formed in narrow grooves. These grooves may be <0.15 μm wide, and >0.5 μm deep, with a aspect ratios that may exceed 3:1 (ratio of height to width). Such damascene structures are typically formed in a multi-step process, of the type shown in FIG. 1. First, in step 110, photoresist layer 101 is formed on insulator layer 102 over substrate 103. Insulator 102 is a material such as silicon dioxide, and substrate 103 is silicon. In step 111, photoresist layer 101 is patterned, forming grooves 104a-f. The structure is then etched in step 112, forming grooves 105a-f in the insulator layer 102. Note that the grooves are less deep than the thickness of the insulator 102. The photoresist layer 101 is subsequently stripped. In step 113 the structure is coated with a barrier layer of a metal such as tantalum, followed by a seed layer of a metal such as copper, indicated as combined layers 105bs. The copper seed layer provides a conductive coating to allow electroplating of a thick copper layer onto the structure in step 114, that material being shown as layer 106. The seed layer may be 1000 Å thick on the surface, but only 100-200 Å thick on the walls of the grooves. Similarly, the tantalum layer may be 250 Å thick on the surface, but only 50 Å or less thick on the walls of the grooves. The tantalum layer prevents the copper from diffusing into the underlying layers; hence its name “barrier”, and also improves adhesion of the copper to insulator 102. In step 115 the electroplated layer 106 is polished away, leaving a fill of copper in the grooves.
The yield of this process depends on the thickness t of each sidewall of each groove. This is a parameter called sidewall coverage. If the sidewall coverage is too thin, then the coating may be discontinuous, or even non-existent. It then acts as a poor nucleating surface for the subsequent electrodeposition of subsequent thick layer 106, causing problems such as void formation. These voids act as breaks in the metal line, either preventing current flow, or constricting current flow to the point where the line locally overheats and fails. If the coating is too thick, the top of the groove may close off, preventing adequate circulation of electrodeposition electrolyte, resulting in poor filling of the grooves. This problem is further aggravated as the technology advances, and the grooves become deeper and narrower
A prior art method for measuring sidewall coverage uses transmission electron microscopy (TEM) imaging. In TEM imaging, a sample is prepared, either by using a focused ion beam that etches away a portion of the array, or by cleaving a sample and ion milling it to make it sufficiently thin so that it can be penetrated with high-energy electrons to form a TEM image. This is obviously a destructive method, since a portion of the integrated circuit must be physically removed. It is also slow, because adequate removal of material at any site may take many tens of minutes, and additional sample preparation, mounting and alignment may take hours. Thus, TEM imaging is useful for analytic diagnosis, but, being destructive and slow, is unsuitable for process control.
An abstract of a paper entitled “Mining Diagnostic Information from CD-SEM for Photolithography Control” by Haolin Zhang, available over the Internet at http://buffy.eecs.berkeley.edu/IRO/Summary/98abstracts/chapter5.html states that “Top view CD-SEM is a routine inspection tool in today's fabrication line. Even though relatively accurate critical dimensions can be obtained from a CD-SEM, much more information is hidden in the high resolution SEM images. The digitized SEM scan is a signal that may be used to monitor and diagnose the process sequence. We successfully used SEM traces of small test patterns to correctly infer two critical process parameters: focus distance and exposure dose. Principal component analysis (PCA) is applied to extract the characteristic feature behind the digitized SEM image. A feed-forward neural network trained by back propagation has been implemented to classify the different conditions. The sidewall profile of the pattern can also be studied by similar methodology. We plan to find an appropriate algorithm to relate the top view CD-SEM to the sidewall profile and film thickness. We will use an atomic force microscope (AFM) and/or cross-sectional SEM to extract sidewall information in order to calibrate the model.”
The abstract of another paper, entitled “Real Time Monitoring of Grating Structures Using RCWA Modeling and Two-Channel Spectral Reflectometry” by Hsu-Ting Huang et al. available over the Internet at http://www.aps.org/meet/MAR00/baps/abs/S6480.html states “We have previously demonstrated that specular SE or SR data from grating structures can be accurately analyzed using vector diffraction theory (using the rigorous coupled wave analysis method, RCWA) to extract the topography of surface relief gratings on wafers. In ex situ experiments, we have demonstrated that this method accurately yields critical dimensions, feature heights, and wall angles more complex sidewall shape information from deep sub-micron gratings. We have also reported on a high-speed, low-cost optical system, two channel spectroscopic reflectometry (2CSR), for in situ monitoring. Our current 2CSR system simultaneously measures |R_p|^2 and |R_s|^2 over the 370-850 nm spectral range at minimum sampling time of 6 ms. In this talk, we will show the first demonstrations of in situ, real-time monitoring of feature evolution in a reactive ion etching system (RIE). Using 2CSR and RCWA-based analysis we have successfully extracted the critical dimensions, wall shape, and feature height evolution of a 0.35 μm line/space photoresist grating during an O—2 RIE process. Cross-sectional SEM photos before and after the etch runs will be shown which verify the high accuracy of this method. We will show variations in the topography evolution with changes in the RIE conditions. Measurement sensitivity issues and implications for industrial process control will be discussed.”